FreeIO.org Toast Board Developer's Notes

As of 13 September 2001

Introduction:

The FreeIO.org Toast board is an experimental development board designed to be a reference design, utilizing the Motorola MCF5307 ColdFire processor. It includes the processor, 16 MB of 32 bit wide SDRAM, 4 MB of 16 bit wide flash memory, real time clock, two serial ports, provisions for two 10/100BaseT Ethernet ports, and a PC/104 expansion port. This design utilizes almost entirely surface mount parts, but intentionally it has not been miniaturized in order to ease development and debugging.

In order to contain development costs, the Toast board has been built using the most producible design rules possible. Internal planes are provided for ground and the +3.3 volt power. All signals are routed on the top and bottom planes, using 8 mil lines and spaces. This results in the minimum cost bare board.

The size chosen for the Toast board is a standard Eurocard 6U short form factor. The expansion bus is a standard PC/104 in physical form, but limited to the signals which the developer currently needs. While it is true that this results in an incomplete PC/104 interface, since this project is released under the GNU General Public License, anyone who has the inclination to improve it is welcome to do so.

Goals:

The FreeIO.org toast board is being developed to suit several purposes:

The first goal is to develop a fully documented working ColdFire controller upon which to build other devices. The Toast board could stand alone if all the user needs is the Ethernet and serial ports, but the addition of the PC/104 interface makes hacking the hardware a fairly easy thing to do.

The second goal is to port uClinux to the Toast board. Since the Toast board is somewhat similar to the Lineo NetTel for which a port exists (Thanks, Greg!) the port to the Toast board should be fairly straightforward. The largest difference is the upgrade from the SMSC 91C96 10BaseT Ethernet controller to the SMSC 91C111 10/100BaseT Ethernet controller. Both are from the SMSC Feast family, and the programming registers are very similar.

The third goal is to build I/O devices and drivers with which to build systems. These I/O devices are designed to work through the PC/104 port. The FreeIO.org Grits board is the first of these interfaces, and is a programmable general purpose 20 bit wide I/O. Currently planned is a front panel controller to allow a generic keypanel input and a Noritake EL display. All of the I/O boards are based on in system programmable CPLDs to allow them to be reconfigured to meet changing requirements.

Details:

Programmable Logic: This Toast design is almost entirely made up of large scale LSI. The interface and glue logic have been put into an in-system programmable CPLD. This considerably simplifies the troubleshooting, since it is possible to change internal connections without having to rewire the board in many cases. Furthermore, it allows for system changes to suit future requirements. I chose to use the Lattice ispLSI2128VE100LQ160 as the CPLD. I have had several people try to convince me that I ought to change to their favorite part, but since I have a tray of these parts, and since I own a license for the tools, I will stick with this part for now. I picked the large package intentionally - since I have to wire these boards by hand, even with my binocular microscope it gets hard to solder the pins on the small parts. It is fairly inexpensive, readily available, and the tools came to me for free (Thanks to Bruce Hardy of CSR in Huntsville, Alabama, USA). Now the '2128 is a 3.3 volt part with 5 volt tolerant I/O structure. Since this drives the bus, this is the first limitation of the PC/104 bus - the high/low drive is a 3.3 volt CMOS level.

Power: Because the PC/104 bus standard has assigned positions for +/- 5 volts and +/-12 volts, input pins for these voltages are provided, even though the Toast board only uses the +5 VDC. I chose to put a linear regulator on board to drop the +5 VDC to +3.3 VDC. Yes, I know, a switcher would be somewhat more efficient. Yes, I could have brought the +3.3 VDC on board from the edge connector. I chose to do what I did for two reasons. First, the regulator is on board because if I ever succeed in cramming this design onto the confines of the PC/104 form factor, there is no +3.3 VDC pin on the PC/104 connector. Second, I chose a linear regulator because it is the ultimate in simplicity and would be trivial to get going. Bringing up a new controller design is hard enough without fighting power supply issues.

EMI Issues: You are absolutely on your own. This is an experimental board and is not meant to ever pass any specific EMI requirements under any circumstances whatsoever. I plan to test it to see what it emits, so that I know the areas to watch when designing the instruments I may develop in the future. Since this is an experimental board and not a production board, there is the opportunity to learn what is required to qualify a commercial version. If anyone has the tools in place to do this for the community, let me know.

PC/104 Implementation: I have left some signals out of the PC/104 implementation. The PC/104 electrical specification is based on an x86 processor and a certain set of peripherals, and descends from a general purpose PC. I chose to use the PC/104 form factor because of its physical attributes, i.e. being based on a reliable 2-part connector and not requiring an external physical bus card. I make absolutely no claims that my implementation is anywhere near standard. Several limitations are obvious:

1. The implementation is for a 16-bit only bus. There is no support for 8-bit cards.

2. Only two DMA channels are supported. Since the MCF5307 has exactly two DMA channels available for external use, this seemed like a good choice.

3. Depending upon how the user chooses to program the CPLD, there are either one or two external interrupts available. The only interrupt pins even wired up are for PC/104 bus interrupt numbers 3, 5, and 7.

4. The bus drive from the Toast board is from a 3.3 volt, 5 volt tolerant, CMOS part.

5. Since the ColdFire processors do not have separate memory and I/O space, the PC/104 bus I/O space is derived from the ColdFire chip select CS7.

6. There is no provision for alternate bus masters. The ColdFire processor is assumed to always be the bus master.

Ethernet Controllers: The inclusion of two Ethernet controllers was at the request of a potential user who requested that it be included. "It could be used as a router," he said. He also pointed out that the use of this board as a router between two heavily loaded 100BaseT links could potentially run out of processor cycles, depending upon the router rules. You have been warned. Just because the Toast board has two 10/100BaseT ports on it does not guarantee that your application using both of them will work. But you knew that already, didn't you?

Power Distribution: The Toast board has a plane for the ground signal and another plane for the +3.3 VDC signal. There are also a lot of bypass connectors, which have been strategically placed to bypass the individual power pins of the ICs. I do not know how many are enough, but from experience it is easier to put places for more than are needed, and "Muntz" the design later if it seems appropriate. The object of the Toast board is primarily logic development and as such I would rather not fight power issues since they are a large source of confusion. The on-board +3.3 VDC regulator and its tantalum bypass capacitors provide a low impedance source to the +3.3 VDC plane. The local ceramic capacitors increase the short term current pulse capacity to the ICs.

Note that the MCF5307 has separate power bypassing for its PLL power input. This is very important both to make the PLL work properly and also to reduce system noise.

Programming the CPLD: The Lattice ispLSI2128VE100LQ160 CPLD can be programmed and erased/reprogrammed at any time through P2, the Lattice CPLD Programming Port. The '2128 holds its program in internal EEPROM, and requires no external battery backup. Lattice provides a cable with their software kits which connects between a PC parallel port and the programming port. programming the CPLD with the supplied software takes about one minute, and can be done hundreds of times as required to change the functionality of the CPLD.

Layout: The layout is designed to get the parts and connections on the top and bottom layers, with no inner planes other than for +3.3V and ground. There are no blind or buried vias. The object here is to make a board which is relatively inexpensive, can be easily tested and, if necessary, modified. If I ever get around to shrinking the design to fit entirely within the confines of a PC/104 card, so much of the surface of the board will be covered with part bodies that it will be much more difficult to modify.

Answers to questions I Have received:

1. Who is funding the Toast board development?

There is no external funding. I am paying for the project out of my own pocket, which is why it has taken me too many months to get this far. Any parts I had troubles obtaining, I simply designed out in favor of those which I could obtain. All the parts that are designed in are ones which I have already obtained and have on hand. This prevents me from designing in any "unobtanium." Because of minimum buys on some important parts (like the ColdFire processor - no samples could be obtained from Motorola, and the minimum buy was a full tray) the project will have cost me about US$2800, and that includes enough extra of most electronic parts to make a dozen boards additional.

2. Can I convert the Eagle CAD files to OrCAD? Pads? Protel? Accel?

I welcome the efforts of anyone who converts this project to any other CAD system, and I will gladly put the results up on the FreeIO.org web site. I develop projects using CAD tools which I have licenses for, and that means Eagle. The opportunity to export this design is yours.

3. Can I convert the design to work with a CPLD/FPGA from Xilinx? Altera?

I will welcome the efforts of anyone who does so, and if the design looks good I would be willing to put the results up on the FreeIO.org web site.

4. Can I modify the board to support some specific piece of external equipment?

I choose not to at this time. The designs I release are projects that either interest me somehow or will be used in some work project. You are most welcome to expand upon these designs under the terms of the GNU General Public License (GPL). Have fun!

5. Can I buy a board, populated or unpopulated?

I am not selling anything at this time. If someone wants to build and sell boards, that is fine with me. All the designs are released under GPL, and my reading of GPL leads me to believe that GPL is permission enough.