Tag Archives: app note

App note: Low-power battery temperature monitoring

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Low current consumption temperature battery monitoring TMP303 from Texas Instruments. Link here (PDF)

Charging a battery cannot be independent of temperature. In fact, most batteries specify a range of temperatures where charging is permitted. Charging outside these bounds risks damage, failure or worse. To prevent charging when the temperature is too hot or too cold, a temperature sensor and corresponding circuitry are required to disable the charging circuit accordingly. Some temperature sensors like TMP303 already incorporate this functionality. TMP303 monitors the local temperature and asserts its output when the temperature rises above or falls below factory-programmed trip points. This output signal is used to disable the charging circuit.

App note: Stopping reverse current flow in standard hot swap applications

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Application report from Texas Instruments about a simple circuit that blocks reverse currents. Link here (PDF)

The proposed circuit uses an inexpensive operational amplifier to sense the condition of the output voltage exceeding the input voltage, and subsequently disable the hot swap controller, stopping the flow of reverse current (current flow from the output (load) into the input (supply)). The device used for testing this method is the LM5069, configured to provide hot swap control of input voltages from 11V to 22V to a load capacitor of 220 µF. A schematic of the solution and results are provided.

App note: Fast Rail-to-Rail operational amplifiers ease design constraints in low voltage high speed systems

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Migration to lower rail voltages considerations on operational amplifier designs an Application note from Analog Devices. Link here (PDF)

Movement towards lower power supply voltages is driven by the demand that systems consume less and less power coupled with the desire to reduce the number of power supply voltages in the system. Lowering power supply voltages and reducing the number of supplies has obvious advantages. One such advantage is to lower system power consumption. This has the additional benefit of saving space. Lowering overall power consumption has a residual benefit in that there may no longer be a need for cooling fans in the system.

However, as the traditional system power supply voltages of ±15 V and ±12 V give way to lower bipolar supplies of ±5 V and single supplies of +5 V and +3.3 V, it is necessary for circuit designers to understand that designing in this new environment is not simply a matter of finding components that are specified to operate at lower voltages. Not all design principles used in the past can be directly translated to a lower voltage environment.

Reducing the power supply voltage to a typical op amp has a number of effects. Obviously, the signal swings both at the input and output are reduced. The required headroom between signal and rail (typically 1 V to 2 V in conventional amplifiers), which is of lesser importance with power supplies of ±15 V, now drastically reduces the usable signal range. While this reduction does not normally increase noise levels in the system, signal-to noise ratios will be degraded. Because the designer can no longer use techniques such as increasing power supply voltages and signal swings in order to “swamp” noise levels, greater attention must be paid to noise levels in the system.

App note: Resolution enhancements of digital potentiometers with multiple devices

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An old application note from Analog Devices about configuring multiple digital potentiometers to improve resolution, accuracy and programming complexity might add-up to the mix though. Link here (PDF)

Digital potentiometers usually come with standard resistance values of 10k, 100k, and 1MW at a given number of adjustable steps. If an application requires a resistance range that falls between these values, users will most likely apply a part with a resistance larger than needed scarifying resolution. Fortunately, users can parallel, stack, or cascade multiple digital potentiometers to optimize the resolution for a given application. In this article, we will share some of the ideas that may solve the challenge.

App note: Selecting coupled inductors for SEPIC applications

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Application example from Coilcraft on how coupled inductors gain advantage over separately wound inductors, calculations included. Link here (PDF)

The SEPIC (Single-Ended Primary Inductance Converter) topology is used in applications that require characteristics of both a buck and a boost regulator, specifically the ability to step up and step down the input voltage. Most often operated in CCM (Continuous Conduction Mode), SEPIC provides a non-inverted output voltage.

Typically, SEPIC is used in battery operated systems and automotive applications. In these applications, the battery input voltage, or bus line voltage, may be greater or less than that of the desired output voltage, depending on the charge state of the battery. The SEPIC topology can operate over more of the battery discharge cycle because of the ability to regulate the output voltage over a wider input voltage range, including above and below the output voltage.

The selection of one coupled inductor over two single parts saves board space and can also save cost.

App note: Choosing inductors for energy efficient power applications

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Designing efficient power converters guide from Coilcraft. Link here (PDF)

In high frequency DC-DC converters, inductors filter out the AC ripple current superimposed on the DC output. Whether the converter steps the voltage down – buck – or steps the voltage up – boost – or both up and down – SEPIC, the inductor smooths the ripple to provide a pseudo-DC output.

For battery powered applications, battery life is extended by improving the efficiency of the entire power supply circuit, and inductor efficiency is often a major consideration in the design. Careful consideration of inductor efficiency can mean the difference between having your battery work when you need it and having to stop in the middle of an important task to plug it into a charger.

Inductor efficiency is highest when the combination of core and winding losses are the lowest. Therefore, the goal of highest efficiency is met by selecting an inductor that provides sufficient inductance to smooth out the ripple current while simultaneously minimizing losses. The inductor must pass the current without saturating the core or over-heating the winding.