Nearly a year ago, an extremely interesting project hit Kickstarter: an open source GPU, written for an FPGA. For reasons that are obvious in retrospect, the GPL-GPU Kickstarter was not funded, but that doesn’t mean these developers don’t believe in what they’re doing. The first version of this open source graphics processor has now been released, giving anyone with an interest a look at what a late-90s era GPU looks like on the inside, If you’re cool enough, there’s also enough supporting documentation to build your own.
A quick note for the PC Master Race: this thing might run Quake eventually. It’s not a powerhouse. That said, [Bunnie] had a hard time finding an open source GPU for the Novena laptop, and the drivers for the VideoCore IV in the Raspi have only recently been open sourced. A completely open GPU simply doesn’t exist, and short of a few very, very limited thesis projects there hasn’t been anything like this before.
Right now, the GPL-GPU has 3D graphics acceleration working with VGA on a PCI bus. The plan is to update this late-90s setup to interfaces that make a little more sense, and add DVI and HDMI output. Not bad for a failed Kickstarter, right?
Filed under: hardware
, video hacks
Flappy Bird has been ported to just about every system imaginable, including but not limited to the Apple II, Commodores, pretty much every version of the Atari, and serves as a really great demonstration of the TI-99’s graphics capabilities. Porting is one thing, but having a computer automate Flappy Bird is another thing entirely. [Ankur], [Sai], and [Ackerly] in [Dr. Bruce Land]‘s advanced microcontroller design class at Cornell have done just that. They’re playing Flappy Bird with a camera, FPGA, and a penny wired up to a GPIO pin to guide the little 8-bit-bird through Mario pipes.
The setup the team is using consists of a webcam that records the screen of a smartphone, an FPGA, and a little bit of circuitry to emulate screen taps. Inside the FPGA, the team is looking at the video stream from the phone to detect the bird, pipes, and gaps. The ‘tapper’ unit is a US penny, placed right above the ‘tap’ button, wired to a GPIO port. This was found to be the ideal contact for a capacitive touch screen – taps that were too small weren’t registered, and taps that were too big registered as two taps.
For spending an entire semester on automating Flappy Bird, the team has a lot of knowledge to show for it, but not the high score: the bird only makes it through the first pipe 10% of the time, and the second pipe 1% of the time. The high score is three. That’s alright – getting the algorithm right to play the game correctly was very, very difficult, and to nail that problem down, they estimate it would take at least another semester.
Filed under: hardware
Over on the University of Reddit there’s a course for learning all about FPGAs and CPLDs. It’s just an introduction to digital logic, but with a teacher capable of building a CPLD motor control board and a video card out of logic chips, you’re bound to learn something.
The development board being used for this online course is an Altera EMP3032 CPLD conveniently included in the Introduction to FPGA and CPLD kit used in this course. It’s not a powerful device by any measure; it only has 32 macrocells and about 600 usable gates. You won’t be designing CPUs with this thing, but you will be able to grasp the concept of designing logic with code.
Future lessons include building binary counters, PWM-controlled LEDs, and a handheld LED POV device. In any event, it’s a great way to learn about how programmable logic actually works, and a fairly cheap way to get into the world of FPGAs and CPLDs. Introductory video below.
Filed under: hardware
Now that [Bunnie]‘s open hardware laptop – the Novena – is wrapping up its crowdfunding campaign, it only makes sense that development around the Novena project would move over to the more interesting aspects of a completely hackable laptop. The Novena has a huge FPGA on board, with 2 Gbit of very fast memory hanging off it. Also, every single signal pin of the FPGA is broken out on high-speed connectors, making for some very, very interesting possible add-on boards. [Bunnie] has always wanted a portable, high-end oscilloscope to carry with him, and with the new oscope module, he has something that blows out of the water every scope priced below a thousand dollars.
The oscilloscope module [Bunnie] is working on has either two 8-bit channels at 1 GSPS or one 8-bit channel at 2 GSPS with an analog bandwidth of up to 900MHz. The module also has 10 digital channels, so if you need a logic analyzer, there you go.
Being a fairly high-end scope, the hardest part of engineering this scope is the probes. The probes for fast, high-end scopes cost hundreds of dollars by themselves, so [Bunnie] looked for a clean-sheet redesign of the lowly oscope probe. To connect the probe to the module, [Bunnie] realized a SATA cable would be a great solution; they’re high bandwidth, support signals in the GHz range, and are rated for thousands of insertions. These active probes can be combined with a number of front ends for application specific probes – digital probes, ones for power signature analysis, and ones for capturing signals across small loops of wire.
The module itself isn’t quite ready for production yet, but by the time the Novena crowdfunding campaign starts shipping, [Bunnie] will probably be working on the next add-on module for his crazy awesome laptop.
Filed under: hardware
[Will] wrote a 128MHz Z80-based retro microcomputer which runs on a Papilio Pro board. For those who don’t know, the latter is built around a Spartan-6 LX9 FPGA so you may imagine that much work was required to implement all the computer features in VHDL. The T80 CPU core was taken from opencores, the SDRAM controller was imported from Mike Field’s work but [Will] implemented several additional functions on his own:
- a 4KB paged Memory Management Unit to translate the 16-bit (64KB) logical address space into a 26-bit (64MB) physical address space.
- a 16KB direct mapped cache to hide the SDRAM latency, using the FPGA internal block RAM
- a UART interface for external communications
He also ported CP/M-2.2, MP/M-II and UZI (a UNIX system) to the computer. His project is completely open-source and all the source code can be downloaded at the end of [Will]‘s write up.
Thanks [hamster] for the tip.
Filed under: FPGA
The guys over at hackshed have been busy. [Carl] is making programmable logic design easy with an 8 part CPLD tutorial. Programmable logic devices are one of the most versatile hardware building blocks available to hackers. They also can have a steep learning curve. Cheap Field Programmable Gate Arrays (FPGA) are plentiful, but can have intricate power requirements. Most modern programmable logic designs are created in a Hardware Description Language (HDL) such as VHDL or Verilog. Now you’ve got a new type of device, a new language, an entirely new programming paradigm, and a complex IDE to learn all at once. It’s no wonder FPGAs have sent more than one beginner running for the hills.
The tutorial cuts the learning curve down in several ways. [Carl] is using Complex Programmable Logic Devices (CPLD). At the 40,000 foot level, CPLDs and FPGAs do the same thing – they act as re-configurable logic. FPGAs generally do not store their configuration – it has to be loaded from an external FLASH, EEPROM, or connected processor. CPLDs do store their configuration, so they’re ready as soon as they power up. As a general rule, FPGAs contain more configurable logic than CPLDs. This allows for larger designs to be instantiated with FPGAs. Don’t knock CPLDs though. CPLDs have plenty of room for big designs, like generating VGA signals.
[Carl] also is designing with schematic capture in his tutorial. With the schematic capture method, digital logic schematics are drawn just as they would be in Eagle or KiCad. This is generally considered an “old school” method of design capture. A few lines of VHDL or Verilog code can replace some rather complex schematics. [Carl's] simple designs don’t need that sort of power though. Going the schematic capture route eliminates the need to learn VHDL or Verilog.
[Carl's] tutorial starts with installing Altera’s Quartus II software. He then takes the student through the “hardware hello world” – blinking an LED. By the time the tutorial is done, the user will learn how to create a 4 bit adder and a 4 bit subtractor. With all that under your belt, you’re ready to jump into big designs – like building a retrocomputer.
[Image via Wikimedia Commons]
Filed under: FPGA
Cheap FPGA boards are readily available, as are VHDL implementations of classic CPUs like the 6502, 6809, and Z80. Up until now, we haven’t seen anyone take these two parts and combine them into a complete system that turns an FPGA board into a complete 8-bit retrocomputer. Thanks to [Grant]‘s work, it’s now possible to do just that (server on fire, here’s a google cache) with a $30 FPGA board and a handful of parts.
In its full configuration, the Multicomp, as [Grant] calls his project, includes either a 6502, 6809, Z80, or (in the future) a 6800 CPU. Video options include either monochrome RCA, RGB VGA, or RGB via SCART. This, along an SD card interface, a PS2 keyboard, and the ability to connect an external 128kB RAM chip (64k available) means it’s a piece of cake to build a proper and complete portable retrocomputer.
What’s extremely interesting about [Grant]‘s project is the fact the data and address lines are fully exposed on the FPGA board. This means it’s possible to add whatever circuit you’d like to whatever retrocomputer you can imagine; if you want a few NES gamepads, an IDE interface, or you’d like to design your own primitive video card, it’s just a matter of designing a circuit and writing some assembly.
If you’d like to build your own, search “EP2C5T144C8N” on the usual sites, grab a few resistors and connectors, and take a look at [Grant]‘s documentation and upcoming examples.
Via 6502.org forums
Filed under: classic hacks
[Valentin] recently tipped us about an FPGA development board he just finished. It is called the FleaFPGA and is aimed to get people interested in the world of Field Programmable Gate Arrays. One of the other reasons that also got [Valentin] to design his own board was that he was frustrated with the existing solutions, them being either too pricey or fairly spare in terms of connectivity.
The main components that you can see in the platform shown above are: a lattice MachX02-7000HE FPGA (6864LUTs), 256Mbits of SDRAM, a USB2.0 host port, a 4096-color VGA connector, a 3.5mm stereo connector, an SD/MMC card slot, a PS/2 keyboard/mouse combo port, a few push buttons and LEDs. An expansion header is also present in order to connect the FleaFPGA to future shields that will be developed. Unfortunately only the board schematics have been released and [Valentin] is currently aiming for a price of $60 per board for <100 quantities. You’ll be able to see a video of the board in action after the break, in which the FPGA has been loaded with a 68000 software core running a variation of the Amiga Juggler Demo.
Filed under: FPGA
Unless you’re bit-banging a CRT interface or using a bunch of resistors to connect a VGA monitor to your project, odds are you’re using proprietary hardware as a graphics engine. The GPU on the Raspberry Pi is locked up under an NDA, and the dream of an open source graphics processor has yet to be realized. [Frank Bruno] at Silicon Spectrum thinks he has the solution to that: a completely open source GPU implemented on an FPGA.
Right now, [Frank] has a very lightweight 2D and 3D engine well-suited for everything from servers to embedded devices. If their Kickstarter meets its goal, they’ll release their project to the world, giving every developer and hardware hacker out there a complete, fully functional, open source GPU.
Given the difficulties [Bunnie] had finding a GPU that doesn’t require an NDA to develop for, we’re thinking this is an awesome project that gets away from the closed-source binary blobs found on the Raspberry Pi and other ARM dev boards.
Filed under: Crowd Funding
The last time [Mark] was at the scrap yard, he managed to find the analogue input and output cards of an old Akai DR8 studio hard drive recorder. These cards offered great possibilities (8 ADC inputs, 12 DAC outputs) so he repaired them and made a whole audio system out of them.
The repair only involved changing a couple of low dropout regulators. Afterwards, [Mark] interfaced one of his CPLD development boards so he could produce some sine waves and digitize signals generated from a PC based audio test unit. He then made the frame shown in the picture above and switched to an Altera Cyclone IV FPGA. To complete his system, he designed a small board to attach a VGA screen, and another to use the nRF24L01 wireless module.
Inside the FPGA, [Mark] used a NIOS II soft core processor to orchestrate the complete system and display a nice user interface. He even made another system with an USB host plug to connect MIDI enabled peripherals, allowing him to wirelessly control his creation.
Filed under: hardware
We’ve been following the work of [Andrew Holme] and his homebrew GPS receiver for a while now. A few years ago, [Andrew] built a four-channel GPS receiver from scratch, but apparently that wasn’t enough for him. He expanded his build last year to track up to eight satellites, and this month added a Raspberry Pi for a 12-channel, battery-powered homebrew GPS receiver that has an accuracy of about 3 feet.
The Raspi is attached to an FPGA board that handles the local oscillator, real-time events, and tracks satellites automatically. The Pi handles the difficult but not time-critical math through an SPI interface. Because the Pi is attached to the FPGA through an SPI interface, it can also load up the FPGA with even more custom code, potentially turning this 12-channel receiver into a 16- or 18-channel one.
An LCD display attached to the FPGA board shows the current latitude, longitude, and other miscellaneous data like the number of satellites received. With a large Li-ion battery, the entire system can be powered for about 5 hours; an impressively portable GPS system that rivals the best commercial options out there.
Filed under: hardware
, Raspberry Pi
The popularization of FPGAs for the hobbyist market means a lot more than custom LED controllers and clones of classic computer systems. FPGAs are also a great tool to experiment with computer architecture, creating new, weird, CPUs that don’t abide by the conventions the industry has used for 40 years. [Victor] is designing a new […]
For the twenty-fourth OSHUG meeting we've decided to try something new and we will be hosting a series of lightning talks. The first five talks have been confirmed and details of these can be found below. Offers of additional talks of between five and ten minutes are invited and proposals can either be submitted in advance via e-mail or made on the night (please arrive early).
Note that this month the meeting takes place on a Wednesday.
FUNcube-1 is a UK amateur radio educational satellite that is due to be launched later this year, and that uses open source hardware to bring real-time space based experiments to classrooms around the globe. Three members of the on-board computer team will discuss project goals and progress.
64-core Parallella Prototype
Simon Cook will be demonstrating one of only two 64-core Parallella prototypes in the UK.
PCBmodE — a PCB design tool written in Python around JSON, SVG and Inkscape
Saar Drimer will be talking about an open source PCB design tool, that reads shape and placement information stored in JSON files to produce an SVG graphical representation of them. Routing is drawn with Inkscape, then extracted by PCBmodE and stored in an input JSON file that's used for the next board generation. A post-processor 'gerberises' the SVGs into "Extended Gerbers" (RS-274X) for manufacturing.
Interfacing High-performance Low-cost Embedded Systems with FPGAs
Mustafa H. Yuce will be talking about an open source project that interfaces embedded systems including BeagleBone and Raspberry Pi with FPGAs, to enable the implementation of high-speed parallel processing applications such as computer vision.
Alan Wood will be talking about the recently developed Flux series of boards that are used for motion control applications.
Open Source Junction 4 Report
Paul Tanner will be providing a report from the OSS Watch two day workshop, Open Source Junction 4: Open Source Hardware meets Open Source Software.
Note: Please aim to arrive for 18:00 - 18:20 as the event will start at 18:30 prompt.
When the developer of the µTorrent torrent client and the ScummVM LucasArts adventure game interpreter gets bored, something cool is bound to happen. Luckily for us, [Ludde] was a bit listless over Christmas, and with more time than energy to burn, implemented a Nintendo Entertainment System on an FPGA dev board.
The NES was powered by a Ricoh 2A03 CPU, a chip nearly identical to the 6502 found in the Commodore 64s and Apple IIs of the early 1980s. There are a few differences between the two, though: the NES CPU includes an Audio Processing Unit on the chip and is connected to a very cool Picture Processing unit elsewhere on the NES. [Ludde] put all these chips in his Spartan-6 FPGA with a lot of Verilog code.
The rest of the system – the RAM, display output, and controller input comes from the peripherals attached to the FPGA dev board. [Ludde]‘s specific board didn’t have a good digital to analog converter, so the composite output was traded for a VGA output. It’s not a completely accurate color pallet, but it’s still an amazing piece of work for someone who was simply bored.
Filed under: hardware
, nintendo hacks
Out of the depths of a junk drawer, [Alex]‘s friend pulled out an old monochrome LCD display. This is an older low-resolution display from ancient electronics that unfortunately doesn’t have its own controller chip. No worries, though, because with the help of an FPGA [Alex] figured out how to drive this display.
On the back of this display are eight Hitachi LCD drivers, six column shifters and two row shifters, allowing the LCD to display a 256×128 pixel image. Without an LCD controller, though, [Alex] couldn’t just send a static image to the LCD. Instead, he had to continuously refresh the display just like a VGA monitor.
With the help of a 1500-page PDF titled Hitachi LCD Controller/Driver LSI Data Book, [Alex] was able to dump pixels into the ICs on the display with the help of a Papilio One FPGA board. A lot of work just to display the beautiful [Lena], but she wouldn’t have it any other way.
Filed under: hardware