Tag Archives: fpga

Homebrew GPS gets ±1 meter resolution with a Raspberry Pi

via Hack a Day» hardware

GPS

We’ve been following the work of [Andrew Holme] and his homebrew GPS receiver for a while now. A few years ago, [Andrew] built a four-channel GPS receiver from scratch, but apparently that wasn’t enough for him. He expanded his build last year to track up to eight satellites, and this month added a Raspberry Pi for a 12-channel, battery-powered homebrew GPS receiver that has an accuracy of about 3 feet.

The Raspi is attached to an FPGA board that handles the local oscillator, real-time events, and tracks satellites automatically. The Pi handles the difficult but not time-critical math through an SPI interface. Because the Pi is attached to the FPGA through an SPI interface, it can also load up the FPGA with even more custom code, potentially turning this 12-channel receiver into a 16- or 18-channel one.

An LCD display attached to the FPGA board shows the current latitude, longitude, and other miscellaneous data like the number of satellites received. With a large Li-ion battery, the entire system can be powered for about 5 hours; an impressively portable GPS system that rivals the best commercial options out there.


Filed under: hardware, Raspberry Pi

Building new, weird CPUs in FPGAs

via Hack a Day» hardware

The popularization of FPGAs for the hobbyist market means a lot more than custom LED controllers and clones of classic computer systems. FPGAs are also a great tool to experiment with computer architecture, creating new, weird, CPUs that don’t abide by the conventions the industry has used for 40 years. [Victor] is designing a new […]

Lightning Talks

via OSHUG

For the twenty-fourth OSHUG meeting we've decided to try something new and we will be hosting a series of lightning talks. The first five talks have been confirmed and details of these can be found below. Offers of additional talks of between five and ten minutes are invited and proposals can either be submitted in advance via e-mail or made on the night (please arrive early).

Note that this month the meeting takes place on a Wednesday.

FUNcube Satellite

FUNcube-1 is a UK amateur radio educational satellite that is due to be launched later this year, and that uses open source hardware to bring real-time space based experiments to classrooms around the globe. Three members of the on-board computer team will discuss project goals and progress.

64-core Parallella Prototype

Simon Cook will be demonstrating one of only two 64-core Parallella prototypes in the UK.

PCBmodE — a PCB design tool written in Python around JSON, SVG and Inkscape

Saar Drimer will be talking about an open source PCB design tool, that reads shape and placement information stored in JSON files to produce an SVG graphical representation of them. Routing is drawn with Inkscape, then extracted by PCBmodE and stored in an input JSON file that's used for the next board generation. A post-processor 'gerberises' the SVGs into "Extended Gerbers" (RS-274X) for manufacturing.

Interfacing High-performance Low-cost Embedded Systems with FPGAs

Mustafa H. Yuce will be talking about an open source project that interfaces embedded systems including BeagleBone and Raspberry Pi with FPGAs, to enable the implementation of high-speed parallel processing applications such as computer vision.

Flux

Alan Wood will be talking about the recently developed Flux series of boards that are used for motion control applications.

Open Source Junction 4 Report

Paul Tanner will be providing a report from the OSS Watch two day workshop, Open Source Junction 4: Open Source Hardware meets Open Source Software.

Note: Please aim to arrive for 18:00 - 18:20 as the event will start at 18:30 prompt.

Sponsored by:

Stuffing an NES into an FPGA

via Hack a Day» hardware

megaman_fpga

When the developer of the µTorrent torrent client and the ScummVM  LucasArts adventure game interpreter gets bored, something cool is bound to happen. Luckily for us, [Ludde] was a bit listless over Christmas, and with more time than energy to burn, implemented a Nintendo Entertainment System on an FPGA dev board.

The NES was powered by a Ricoh 2A03 CPU, a chip nearly identical to the 6502 found in the Commodore 64s and Apple IIs of the early 1980s. There are a few differences between the two, though: the NES CPU includes an Audio Processing Unit on the chip and is connected to a very cool Picture Processing unit elsewhere on the NES. [Ludde] put all these chips in his Spartan-6 FPGA with a lot of Verilog code.

The rest of the system – the RAM, display output, and controller input comes from the peripherals attached to the FPGA dev board. [Ludde]‘s specific board didn’t have a good digital to analog converter, so the composite output was traded for a VGA output. It’s not a completely accurate color pallet, but it’s still an amazing piece of work for someone who was simply bored.


Filed under: hardware, nintendo hacks

Breathing life into an old LCD

via Hack a Day» hardware

panel

Out of the depths of a junk drawer, [Alex]‘s friend pulled out an old monochrome LCD display. This is an older low-resolution display from ancient electronics that unfortunately doesn’t have its own controller chip. No worries, though, because with the help of an FPGA [Alex] figured out how to drive this display.

On the back of this display are eight Hitachi LCD drivers, six column shifters and two row shifters, allowing the LCD to display a 256×128 pixel image. Without an LCD controller, though, [Alex] couldn’t just send a static image to the LCD. Instead, he had to continuously refresh the display just like a VGA monitor.

With the help of a 1500-page PDF titled Hitachi LCD Controller/Driver LSI Data Book, [Alex] was able to dump pixels into the ICs on the display with the help of a Papilio One FPGA board. A lot of work just to display the beautiful [Lena], but she wouldn’t have it any other way.


Filed under: hardware

Raspi astrophotography board also does everything else

via Hack a Day» hardware

FPGA

A few years ago the folks at Astro Designs put together a board that took off-the-shelf CCD sensors from point and shoot cameras and turned them into respectable astrophotography sensors. Since then, the world has seen an explosion of Raspberry Pis, Arduinos, and other microcontroller platforms, making this the perfect time for a hardware revision.

Their PiXi-200, like their previous AstroCam board, is able to take image sensors out of cameras and turn them into telescope mounted cameras. That’s only one of its tricks, though: The PiXi-200 also has accelerometers, gyroscopes, enough UARTs to do just about anything, a four channel ADC and four channel DAC, two dozen GPIO pins, enough LEDs and buttons for any project, and a 200,000 gate FPGA. All this in a board that plugs directly into the GPIO pins on the Raspberry Pi just like an Arduino shield. Needless to say, there’s a lot you can do with this board.

Right now, the design is still in the prototype stage, but once everything is finalized the basic model of the board will sell for £30 GBP ($50 USD). The high-end “Model C” board, with all the bells and whistles, will sell for £45 GPB ($70 USD).


Filed under: hardware, Raspberry Pi

Two computer vision builds from Cornell

via Hack a Day» hardware

land

[Bruce Land], professor at Cornell, is a frequent submitter to our tip line. Usually he sends in a few links every semester from undergraduate electronics courses. Now the fall semester is finally over and it’s time to move on to the more ambitious master’s projects.

First up is a head-mounted eye tracker, [Anil Ram Viswanathan] and [Zelan Xiao] put together a lightweight and low-cost eye tracking project that will record where the user is looking.

The eye tracker hardware is made of two cameras mounted on a helmet. The first camera faces forward, looking at the same thing the user is. The second camera is directed towards the user’s eye. A series of algorithms detect the iris of the user’s eye and overlays the expected gaze position on the output of the first camera. Here’s the design report. PDF, natch.

Next up is a face tracking project implemented on an FPGA. This project started out as a software implementation of a face tracking algorithm in MATLAB. [Thu-Thao Nguyen] translated this MATLAB code to Verilog and eventually got her hardware running on an FPGA dev board. Another design report.

Having a face detection and tracking system running on an FPGA is extremely interesting; the FPGA makes face tracking a very low power and hopefully lower-cost solution, allowing it to be used in portable and consumer devices.

You can check out the videos for these projects after the break.


Filed under: hardware, video hacks

Breadboard friendly FPGAs

via Hack a Day» hardware

fpga

Regular Hackaday readers will be familiar with all the cool things you can do with FPGAs; emulating old video game consoles, cracking encryption protocols, and DIY logic analyzers become relatively simple projects with even a modest FPGA dev board on your workbench. Many FPGA boards aren’t geared towards prototyping, though, and breadboard friendly devices are hard to come by. Here’s a pair of breadboardable FPGAs we’ve found while searching for some related hardware over the past few days

First up is the Mercury FPGA Module. Packaged in a DIP-64 format, the Mercury features a Spartan-3A FPGA with the equivalent of 200k logic gates. Elsewhere on the board is 512kB of RAM and 128kB of Flash storage. There are enough GPIO pins for nearly any project, but sadly only a 10-bit ADC – the same resolution you’d find in an AVR or PIC ‘micro.

Of course the Mercury isn’t the only breadboard-friendly FPGA dev board out there. There’s also the slightly more capable XuLA2 board powered by a Spartan-6 with 32 MB of RAM, 1MB of Flash. Unlike the Mercury, the XuLA2 can also fit in one of those ‘half-sized’ solderless breadboards.

Yes, it’s a different form factor than the commonly recommended Papilio One or the DE0. If you can suggest any other ‘beginners’ (i.e. doesn’t cost an arm and a leg) FPGA boards, leave a note in the comments and we’ll summarize them in another post.


Filed under: hardware

Discrete FPGA will probably win the 7400 logic competition

via Hack a Day » hardware

For this year’s 7400 logic competition, [Nick] decided to build an FPGA out of logic chips.

Perhaps a short explanation is in order to fully appreciate [Nick]‘s work. The basic component of an FPGA is a slice, or cell, that performs boolean operations on its input and sends the result on its output. The core of these slices is a lookup table – basically a truth table that stores the result of every possible input combination.

One very easy way to implement a lookup table is to use a RAM or EEPROM chip. By tying the address lines of an EEPROM to the input and the data lines to the output, it’s possible to create a single slice of an FPGA very easily.

Unfortunately for [Nick], 74-series memories have long been out of production. There is another option open, though: shift registers. A shift register is basically an 8-bit memory chip with parallel inputs, so combining a shift register with an 8-input multiplexer is a very simple way to implement a 3-input, 1-output FPGA slice.

After figuring out how to tie these slices to bus lines, [Nick] needed a way to program them. Verilog or VHDL would border on insanity, so he wrote his own hardware description language. It’s certainly not as powerful or capable as the mainstream solutions to programming an FPGA, but it’s more than enough.

In the video after the break, you can see [Nick]‘s overview of his very large 8-slice FPGA while he runs a combination lock and PWM program. All the code, schematics, and board layout are up on [Nick]‘s git if you’d like to build your own.


Filed under: hardware

Bora board teaches binary hardware

via Hack a Day » hardware

If you’re just starting out in your quest to build really cool electronic devices, you’ll find a ton of options ready for the beginner. The Arduino makes toggling pins dead simple, and the Raspi brings the wonders of blinking a LED from the command line down from the gods and into the hands of the common man. These are all software platforms, though, and if you want to learn digital logic with hardware the best option is still a drawer full of 7400-series logic chips.

[Colin O'Flynn] hopes to change this with a beginners board for digital logic hardware design. It’s called the BORA, or Binary explORer boArd, and brings digital logic to a convenient package that is far less frustrating than a breadboard full of logic chips.

The BORA is based around a CPLD – a cousin of the FPGA-powered devices we see from time to time – that allows any student of digital logic to program the device and fill macrocells with NANDs, NORs, and ANDs.

The Xilinx device used in the BORA has about 1600 gates that can be programmed; more than enough to complete all the projects in the online lectures [Colin] has put together. You can check out the documentation for the BORA over on the official site, and the demo video after the break.


Filed under: hardware, kickstarter

Exploring the Mandelbrot set in real time

via Hack a Day » hardware

The Mandelbrot set – the fractal ‘snowman turned on its side’ seen above – has graced the covers of magazines, journals, and has even been exhibited in art galleries. An impressive feat for what is nothing more than a mathematical function, and has become something of an obsession for [Chiaki Nakajima].

Even on modern computers, generating an image of a portion of the Mandelbrot set takes a good bit of time. When [Chiaki] discovered this fractal in the mid-1980s, the computers of the day took hours to generate a single, low-resolution image. Real-time zooming and scrolling was impossible but [Chiaki] made the best of what he had on hand and built Pyxis, a Mandelbrot set generator made entirely out of TTL logic chips (Google Translate here).

The original Pyxis connected to a desktop computer via a breakout box. while a special program toggled the bits and registers inside the Pyxis to generate pictures of the Mandelbrot set a thousand times faster than the CPUs of the day could muster.

Time marches on, and the original logic chip Pyxis is can be easily surpassed by even the slowest netbooks. There is, however, another way to build a hardware Mandelbrot set generator: FPGAs.

A few years ago, [Chiaki] began work on the Pyxis2010 (translation), an FPGA-based Mandelbrot set generator able to dynamically zoom and pan around the world’s most popular fractal. Built around an Altera Cyclone III FPGA he picked up from Digikey for $600 (no, not a dev board, just a bare chip), [Chiaki] began deadbugging his circuit directly onto the pins of the hugely expensive FPGA. A man with a steady hand and no fear if there ever was one.

Instead of connecting his Mandelbrot generator to a computer and using it as a co-processor, [Chiaki] decided he wanted something more portable. He found an old Sony PSP, removed the LCD screen, and integrated it into his circuit. After a careful bit of dremeling and fabrication, [Chiaki] had a hand-held Mandelbrot generator that is able to display images of the world’s most famous fractal faster than any desktop computer.

It goes without saying this build is incredible. The technical skill to build an insanely fast Mandelbrot generator on an FPGA is astonishing, but basing it off a logic-chip based build reaches into the realm of godliness. You can check out a video of this amazing build after the break.

Props to [Ian Finder] for sending this one in.


Filed under: hardware, misc hacks

Storing user data on your FPGA

via Hack a Day » hardware

We’ve seen FPGAs used to recreate everything from classic arcade games to ancient computers, but with each of these builds a common problem arises. Once you’ve got the hardware emulated on an FPGA, you’ve also got to get the ROMs into the project as well. In a very interesting hack, [Mike] figured out that the serial Flash chip that stores the FPGA settings has a lot of space free, so why not store user data there?

[Mike] got the idea from seeing a recreation of the classic BombJack arcade game we featured last month. In that build, [Alex] needed to store 112Kb of game data stored in 16 ROM chips. Unfortunately, [Alex]‘s FPGA only had space for 40Kb of data. After realizing his FPGA had a 512Kb SRAM chip, [Alex] decided to put all the sprites, sounds, and levels of BombJack in the SRAM.

Impressed with [Alex]‘s build, [Mike] set to work generalizing the hack to work with other projects. [Mike] notes that only a few FPGA boards are capable of storing user data next to the  configuration bitstream; the hack is impossible on the Digilent Basys2 board, but it works wonderfully on a Papilio One 250K.

As a very cool build that makes FPGA-related builds even easier, we’ve got to tip our hat to [Mike] for writing up a great tutorial.


Filed under: hardware

Practical System-on-Chip (Program your own open source FPGA SoC)

via OSHUG

At the ninth OSHUG meeting we were given an introduction to FPGA development, and to the OpenCores community and the OpenRISC 1000 open source processor family. At the seventeenth OSHUG meeting we will be given a comprehensive introduction to the practicalities of programming your own open source FPGA system-on-chip.

How to Program Your Own Open Source FPGA System-on-Chip

It is possible to buy a FPGA prototyping board like the Terasic DE0-nano, capable of running a complete 32-bit System-on-Chip for around £50. Even larger boards with the memory capacity to bring up a full Linux system on the design cost a few hundred pounds.

In this talk Julius Baxter and Jeremy Bennett will present the OpenRISC architecture and OpenRISC Reference Platform SoC (ORPSoC), and show how to take this open source design and get it running on an FPGA board.

This is a practical evening, aimed at users who have never done any chip design. Using a Xilinx ML501 prototyping board, Julius Baxter will demonstrate all the steps from obtaining the initial hardware design through to bringing up the board and booting a full Linux system.

The following topics will be covered:

  • an overview of OpenCores and the OpenRISC project
  • an introduction to the Verilog Hardware Design Language
  • how to synthesize the design into a FPGA bitstream
  • what needs modifying to run on different boards
  • how to get software running
  • porting a simple (newlib) library to the board
  • demonstration of Linux booting

Note that this will be an interactive session, and participants are encouraged to bring along their own FPGA dev boards and laptops and to join in, should they wish. If you have a board that is not listed as having a preconfigured ORPSoC build, or you have any other questions concerning the practicalities of this, you should direct your question to the OSHUG discussion list.

Julius Baxter has been involved with the OpenRISC project for 4 years, and during that time he's worked on everything from processor Verilog RTL to the Linux kernel port. After finishing undergraduate studies in his native Australia, he then studied a System-on-Chip design Master's at KTH in Stockholm, Sweden, while working at ORSoC AB - the owners and operators of OpenCores.org. Now living and working Cambridge, Julius maintains a role as an active developer and maintainer on the OpenRISC project, largely dealing with RTL, toolchain and architecture work.

Dr Jeremy Bennett is Chief Executive of Embecosm which provides open source services, tools and models to facilitate embedded software development with complex systems-on-chip. He has been involved with OpenCores for the past decade, and is responsible for much of the software tool chain. Contact him at jeremy.bennett@embecosm.com.

Note: Please aim to arrive for 18:00 - 18:20 as the event will start at 18:30 prompt.

Sponsored by:

Practical System-on-Chip (Program your own open source FPGA SoC)

via OSHUG

At the ninth OSHUG meeting we were given an introduction to FPGA development, and to the OpenCores community and the OpenRISC 1000 open source processor family. At the seventeenth OSHUG meeting we will be given a comprehensive introduction to the practicalities of programming your own open source FPGA system-on-chip.

How to Program Your Own Open Source FPGA System-on-Chip

It is possible to buy a FPGA prototyping board like the Terasic DE0-nano, capable of running a complete 32-bit System-on-Chip for around £50. Even larger boards with the memory capacity to bring up a full Linux system on the design cost a few hundred pounds.

In this talk Julius Baxter and Jeremy Bennett will present the OpenRISC architecture and OpenRISC Reference Platform SoC (ORPSoC), and show how to take this open source design and get it running on an FPGA board.

This is a practical evening, aimed at users who have never done any chip design. Using a Xilinx ML501 prototyping board, Julius Baxter will demonstrate all the steps from obtaining the initial hardware design through to bringing up the board and booting a full Linux system.

The following topics will be covered:

  • an overview of OpenCores and the OpenRISC project
  • an introduction to the Verilog Hardware Design Language
  • how to synthesize the design into a FPGA bitstream
  • what needs modifying to run on different boards
  • how to get software running
  • porting a simple (newlib) library to the board
  • demonstration of Linux booting

Note that this will be an interactive session, and participants are encouraged to bring along their own FPGA dev boards and laptops and to join in, should they wish. If you have a board that is not listed as having a preconfigured ORPSoC build, or you have any other questions concerning the practicalities of this, you should direct your question to the OSHUG discussion list.

Julius Baxter has been involved with the OpenRISC project for 4 years, and during that time he's worked on everything from processor Verilog RTL to the Linux kernel port. After finishing undergraduate studies in his native Australia, he then studied a System-on-Chip design Master's at KTH in Stockholm, Sweden, while working at ORSoC AB - the owners and operators of OpenCores.org. Now living and working Cambridge, Julius maintains a role as an active developer and maintainer on the OpenRISC project, largely dealing with RTL, toolchain and architecture work.

Dr Jeremy Bennett is Chief Executive of Embecosm which provides open source services, tools and models to facilitate embedded software development with complex systems-on-chip. He has been involved with OpenCores for the past decade, and is responsible for much of the software tool chain. Contact him at jeremy.bennett@embecosm.com.

Note: Please aim to arrive for 18:00 - 18:20 as the event will start at 18:30 prompt.

Sponsored by:

Goes to Canterbury! (Collaboration, building communities, surface mount adventures)

via OSHUG

For our 11th meeting, we are visiting the School of Engineering and Digital Arts at the University of Kent. Trains run regularly to and from central London and take approximately an hour. For anyone wishing to stay overnight please see the list of accommodation.

Open Source Hardware Collaboration

An assessment of the current state of the art in hardware collaboration through a tour of a series of Open Source Hardware projects. How easy is it to discover projects, view and understand their designs, build your own version and contribute changes back?

Paul Downey (psd) is a doodling software hacker, former member of Osmosoft — a small Open Source software team where he represented BT at the W3C, a co-organiser of OSHUG and a co-founder of SolderPad, a collaboration platform for electronic design.

Building open, communicating communities

The hardware engineering community is typically seen as fragmented, closed and conservative, shackled by the dependency on restrictive closed-source tools. Thankfully, we are now at a time where this is changing. In this talk, Saar Drimer will discuss his efforts to bring the FPGA community together so we can reach the level of sharing and project integration that the open source software community currently enjoys. The end goal is to reach a state where projects are integrated in a similar way to what Linux's package mangers enable: "sudo apt-get ddr2-controller". [Background reading].

Saar Drimer is an experienced hardware engineer. In the past he's hacked the UK's Chip and PIN payment system, and advocated reproducible research practices in the engineering sciences. Now he's working on boldport, an "IndieEDA" company that aims to make HW/FPGA easier.

Adventures in working with surface mount devices

An ambitious open source hardware project--Amino--recently called for Alan Wood to uplift his home lab to support prototyping, testing and basic production using surface mount devices. Alan will be sharing with us some of the things he has learnt, and giving us a run through what you might require in order to tackle working with surface mount devices yourself. Rather than using expensive off-the-shelf tooling, Alan will be covering a number of affordable approaches that make this possible without breaking the bank.

Alan Wood originally trained in systems engineering, got lost in software engineering and open source for a decade, before returning back to his hardware roots via the open source hardware and makers movement that has gathered momentum over the last few years.

Note: Please aim to arrive for 18:00 - 18:20 as the event will start at 18:30 prompt. Parking is available at the Jennison Building, however, please ensure that you are parked within a bay.